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LTC3534 1 3534f typical application features applications description 7v, 500ma synchronous buck-boost dc/dc converter the ltc ? 3534 is a wide v in range, highly ef? cient, ? xed frequency, buck-boost dc/dc converter that operates from input voltages above, below or equal to the output voltage. the topology incorporated in the ic provides a continuous transfer function through all operating modes, making the product ideal for multi-cell alkaline/nimh or single lithium-ion/polymer applications where the output voltage is within the battery voltage range. the LTC3534 offers extended v in and v out ranges of 2.4v to 7v and 1.8v to 7v, respectively. quiescent current is only 25a in burst mode operation, maximizing battery life in portable applications. burst mode operation is user controlled and can be enabled by driving the pwm pin low. if the pwm pin is driven high then ? xed frequency switching is enabled. other features include ? xed 1mhz operating frequency, a <1a shutdown, short-circuit protection, programmable soft-start, current limit and thermal overload protection. the LTC3534 is available in the thermally enhanced 16-lead (3mm 5mm) dfn and 16-lead gn packages. 4 aa cells to 5v at 500ma buck-boost converter n regulated output with input voltages above, below or equal to the output n 2.4v to 7v input and 1.8v to 7v output voltage range n 5v v out at 500ma from 4 aa cells n single inductor n synchronous recti? cation: up to 94% ef? ciency n burst mode ? operation with 25a i q n output disconnect in shutdown n 1mhz switching frequency n <1a shutdown current n small thermally enhanced 16-lead (5mm 3mm 0.75mm) dfn and 16-lead gn packages n medical instruments n portable barcode readers n portable inventory terminals n usb to 5v supply n handheld gps l , lt, ltc and ltm are registered trademarks of linear technology corporation. burst mode is a registered trademark of linear technology corporation. all other trademarks are the property of their respective owners. + sw1 10k 15k 162k 649k 3534 ta01a 33pf 330pf 22f v out 5v 500ma sw2 pgnd2 pgnd1 gnd pv in v in pwm run/ss burst pwm off on v out fb v c 5h LTC3534 10f 4 aa cells v in 3.6v to 6.4v v in (v) 3.6 efficiency (%) 100 90 95 85 80 75 6.0 3534 ta01b 4.4 4.0 4.8 5.6 6.4 5.2 pwm i out = 500ma pwm i out = 300ma 4 aa cells to 5v ef? ciency vs v in
LTC3534 2 3534f absolute maximum ratings v in , pv in voltages ........................................ ?0.3v to 8v v out voltage ................................................ ?0.3v to 8v sw1, sw2 voltages dc ............................................................ ?0.3v to 8v pulsed < 100ns ........................................ ?0.3v to 9v run/ss, pwm voltages ............................... ?0.3v to 8v (note 1) 16 15 14 13 12 11 10 9 17 1 2 3 4 5 6 7 8 gnd fb v c v in pv in v out pwm gnd gnd run/ss gnd pgnd1 sw1 sw2 pgnd2 gnd top view dhc package 16-lead (5mm 3mm) plastic dfn t jmax = 125c, ja = 43c/w (4-layer board), jc = 4c/w exposed pad (pin 17) is pgnd, must be soldered to pcb gn package 16-lead plastic ssop narrow - fused 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 gnd run/ss gnd pgnd1 sw1 sw2 pgnd2 gnd gnd fb v c v in pv in v out pwm gnd t jmax = 125c, ja = 90c/w (4-layer board), jc = 37c/w pins 1, 8, 9, and 16 are pgnd, must be soldered to pcb pin configuration order information lead free finish tape and reel part marking package description temperature range LTC3534edhc#pbf LTC3534edhc#trpbf 3534 16-lead (5mm 3mm) plastic dfn ?40c to 85c LTC3534egn#pbf LTC3534egn#trpbf 3534 16-lead ssop narrow - fused ?40c to 85c lead based finish tape and reel part marking package description temperature range LTC3534edhc LTC3534edhc#tr 3534 16-lead (5mm 3mm) plastic dfn ?40c to 85c LTC3534egn LTC3534ede#tr 3534 16-lead ssop narrow - fused ?40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ v c , fb voltages ............................................ ?0.3v to 6v operating temperature range (note 2).... ?40c to 85c maximum junction temperature (note 3)............. 125c storage temperature range ................... ?65c to 150c lead temperature (soldering, 10sec; gn package) ........................... 300c
LTC3534 3 3534f electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC3534e is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. parameter conditions min typ max units input start-up voltage l 2.2 2.4 v input operating range l 2.4 7 v output voltage adjust range l 1.8 7 v feedback voltage (note 4) l 0.975 1 1.015 v feedback input current v fb = measured feedback voltage (note 4) 1 50 na v in quiescent current C burst mode operation v fb = 1.2v, v pwm = 0v (note 5) 25 50 a v in quiescent current C shutdown v run/ss = 0v, not including switch leakage, v out = 0v 0.1 1 a v in quiescent current C active v fb = 1.2v, v pwm = 5v (note 5) 420 700 a input current limit v pwm = 5v l 1 1.8 a reverse current limit v pwm = 5v 500 ma burst current limit v pwm = 0v 400 ma nmos switches leakage switches b and c 0.1 7 a pmos switches leakage switches a and d 0.1 10 a pmos switches on-resistance switches a and d 260 m nmos b switch on-resistance switch b 275 m nmos c switch on-resistance switch c 215 m maximum duty cycle boost (% switch c on) buck (% switch a on) l l 75 100 85 % % minimum duty cycle l 0% frequency l 0.80 1 1.15 mhz error amp av ol (note 4) 74 db error amp source current C15 a error amp sink current 225 a run/ss threshold l 0.4 1 1.4 v run/ss input current C shutdown v run/ss = 400mv; ic is shut down 0.02 1 a run/ss input current C active v run/ss = 5v; ic is enabled 0.28 1 a pwm threshold measured at pwm pin; voltage at which burst mode operation is disabled (pwming enabled) 0.4 1 1.4 v pwm input current v pwm = 5v 1.25 2.5 a the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = v out = 5v, unless otherwise noted. note 3: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 4: the ic is tested in a feedback loop to make this measurement. note 5: current measurements are performed when the outputs are not switching.
LTC3534 4 3534f typical performance characteristics 4 alkaline cells to 5v ef? ciency vs i load usb to 5v ef? ciency vs i load active quiescent and burst mode sleep currents vs v in current limits vs v in minimum start-up voltage vs temperature active quiescent current vs temperature burst mode sleep current vs temperature load current (ma) efficiency (%) 3534 g01 100 90 50 60 70 80 40 30 20 10 0.01 0.1 100 1000 10 1 burst mode operation v in = 3.6v v in = 5v v in = 6.4v load current (ma) efficiency (%) 3534 g02 100 90 50 60 70 80 40 30 20 10 0.01 0.1 100 1000 10 1 burst mode operation v in = 4.35v v in = 4.8v v in = 5.25v input voltage (v) 2.4 active quiescent current (a) burst mode sleep current (a) 425 415 405 395 385 30 26 28 24 22 5.6 4 7.2 3534 g03 8 4.8 3.2 6.4 v fb = 1.2v active quiescent current burst mode sleep current input voltage (v) 2.4 current limit (a) 3.3 2.1 2.4 2.7 3.0 1.8 1.5 5.6 4 7.2 3534 g04 8 4.8 3.2 6.4 v out = 5v peak current limit linear current limit temperature (c) C50 v in start voltage (v) 2.200 2.150 2.175 2.125 25 C25 75 3534 g05 100 050 temperature (c) C50 active quiescent current (a) 450 390 430 410 370 25 C25 75 3534 g06 100 050 v fb = 1.2v temperature (c) C50 burst mode sleep current (a) 50 20 40 30 10 25 C25 75 3534 g07 100 050 v fb = 1.2v t a = 25c, unless otherwise noted.
LTC3534 5 3534f converter line regulation vs temperature converter load regulation vs temperature typical performance characteristics feedback voltage vs temperature switching frequency vs temperature current limits vs temperature burst no-load input current vs v in (switching) pwm no-load input current vs v in (switching) burst maximum output current capability vs v in pwm maximum output current capability vs v in temperature (c) C50 converter line regulation (v) 5.005 4.980 5.000 4.995 4.985 4.990 4.975 25 C25 75 3534 g08 100 050 i load = 100ma 3.6v 5.0v 6.4v temperature (c) C50 converter load regulation (v) 5.01 4.96 5.00 4.99 4.97 4.98 4.95 25 C25 75 3534 g09 100 050 v in = 5v 500ma 300ma 25ma temperature (c) C50 fb voltage (v) 1.001 0.999 0.998 1.000 0.997 25 C25 75 3534 g10 100 050 temperature (c) C50 switching frequency (khz) 1050 1000 1025 950 975 25 C25 75 3534 g11 100 050 temperature (c) C50 current limit (a) 3.0 2.8 2.5 2.3 2.0 1.8 1.5 25 C25 75 3534 g12 100 050 peak current limit linear current limit v in = v out = 5v input voltage (v) 2.4 burst no-load input current (a) 50 45 40 35 30 4.8 3.2 7.2 3534 g13 8 4 6.4 5.6 v out = 5v input voltage (v) 2.4 pwm no-load input current (ma) 18 14 10 6 2 4.8 3.2 7.2 3534 g14 8 4 6.4 5.6 v out = 5v input voltage (v) 2.4 output current capability (ma) 225 150 125 100 75 175 200 50 4.8 3.2 7.2 3534 g15 8 4 6.4 5.6 v out = 5v burst mode operation input voltage (v) 2.4 output current capability (ma) 1800 1200 400 600 800 1000 1600 1400 200 4.8 3.2 7.2 3534 g16 8 4 6.4 5.6 v out = 5v l = 4.7h t a = 25c, unless otherwise noted.
LTC3534 6 3534f typical performance characteristics load transient response in fixed frequency mode, no-load to 300ma burst mode operation v out ripple at 25ma load transition from burst mode operation to fixed frequency mode v out start-up v out = 100mv/div i load = 100ma/div 100s/div v in = v out = 5v i load = 0 to 300ma c out = 22f x5r ceramic 3534 g18 v out = 50mv/div inductor current = 200ma/div 10s/div v in = v out = 5v c out = 22f x5r ceramic 3534 g19 v out = 50mv/div pwm = 2v/div 100s/div v in = v out = 5v i load = 25ma c out = 22f x5r ceramic 3534 g20 v out = 2v/div run/ss = 1v/div (starts at 1v) inductor current = 500ma/div 500s/div i load = 100ma 3534 g21 v out ripple at 300ma load v in = 5v v in = 3.6v v in = 6.4v 1s/div v out = 5v, ac-coupled 20mv/div c out = 22f i load = 300ma 3534 g17 t a = 25c, unless otherwise noted.
LTC3534 7 3534f gnd pads (pins 1, 8, 9, 16; gn package): ic substrate grounds. these pins must be soldered to the printed circuit board ground to provide both electrical contact and a good thermal contact to the pcb. run/ss (pin 2): combined shutdown and soft-start. ap- plying a voltage below 400mv shuts down the ic. apply a voltage above 1.4v to enable the ic and above 2.4v to ensure that the error amp is not clamped from soft-start. an r-c from the enable command signal to this pin will provide a soft-start function by limiting the rise time of the v c pin. gnd (pin 3): signal ground for the ic. pgnd1, pgnd2 (pins 4, 7): power ground for the in- ternal n-channel mosfet power switches (switches b and c). sw1 (pin 5): switch pin where internal switches a and b are connected. connect inductor from sw1 to sw2. minimize trace length to reduce emi. sw2 (pin 6): switch pin where internal switches c and d are connected. minimize trace length to reduce emi. pwm (pin 10): burst mode select. applying a voltage below 400mv enables burst mode operation, providing a signi? cant ef? ciency improvement at light loads. during the period where the ic is supplying energy to the output, the inductor peak current will reach 400ma typical and return to zero current on each cycle. burst mode operation will continue until this pin is driven high. applying a voltage above 1.4v disables burst mode operation, enabling low noise, ? xed frequency operation. v out (pin 11): output of the synchronous recti? er. a ? lter capacitor is placed from v out to gnd. a ceramic bypass capacitor is recommended as close to the v out and gnd pins as possible. v out is given by the following equation: v out = 1.000 ? r1 + r2 r2 v pv in (pin 12): power v in supply pin. a 10f ceramic capacitor is recommended as close to the pv in and pgnd pins as possible. v in (pin 13): input supply pin. connect the power source to this pin. v c (pin 14): error amp output. an r-c network is con- nected from this pin to fb for loop compensation. refer to closing the feedback loop section for component selection guidelines. fb (pin 15): feedback pin. connect v out resistor divider tap to this pin. the output voltage can be adjusted from 1.8v to 7v. the feedback reference voltage is typically 1v. exposed pad (pin 17; dhc package): ic substrate ground. this pin must be soldered to the printed circuit board ground to provide both electrical contact and a good thermal contact to the pcb. pin functions
LTC3534 8 3534f block diagram C + C + C + C + C + pwm logic and output phasing gate drivers and anticross conduction burst mode operation control uvlo 2.2v supply current limit sw a sw1 pv in v in run/ss r ss c ss sw2 l1 antiring v in 2.4v to 7v sw d reverse current limit average current limit sw b 1.8a sw c pgnd2 pgnd1 C500ma + + + + pgnd2 pgnd1 gnd exposed pad v out 11 15 14 7 17 3 4 2 10 6 5 12 13 fb v c c p1 r z c p2 pwm sleep 3534 bd v out 1.8v to 7v pwm comparators C + 1 100k g m = 2.6a C + thermal shutdown shutdown and soft-start 1mhz osc v ref 1v error amp c in shutdown c out c z1 r ff r1 r2
LTC3534 9 3534f operation the LTC3534 provides high ef? ciency, low noise power for a wide variety of handheld electronic devices. linear technologys proprietary topology allows input voltages above, below or equal to the output voltage by properly phasing the output switches. the error ampli? er output voltage on v c determines the output duty cycle of the switches. since v c is a ? ltered signal, it provides rejection of frequencies from well below the switching frequency. the low r ds(on) , low gate charge synchronous switches provide high frequency pulse width modulation control at high ef? ciency. high ef? ciency is achieved at light loads when burst mode operation is invoked and the LTC3534s quiescent current drops to a mere 25a. low noise fixed frequency operation oscillator the frequency of operation is internally set to 1mhz. error ampli? er the error ampli? er is a voltage mode ampli? er. the loop compensation components are con? gured around the ampli? er (from fb to v c ) to obtain stability of the converter. for improved bandwidth, an additional r-c feedforward network can be placed across the upper feedback divider resistor. the voltage on run/ss clamps the error ampli? er output, v c , to provide a soft-start function. supply current limits there are two different supply current limit circuits in the LTC3534, each having internally ? xed thresholds. the ? rst circuit is an average current limit ampli? er, sourcing current out of fb to drop the output voltage should the peak input current exceed 1.8a typical. this method provides a closed loop means of clamping the input current. during conditions where v out is near ground, such as during a short circuit or start-up, this threshold is cut to 800ma typical, providing a foldback feature. for this current limit feature to be most effective, the thevenin resistance from fb to ground should be greater than 100k. should the peak input current exceed 2.6a typical, the second circuit, a high speed peak current limit compara- tor, shuts off pmos switch a. the delay to output of this comparator is typically 50ns. reverse current limit during ? xed frequency operation, the LTC3534 operates in forced continuous conduction mode. the reverse cur- rent limit comparator monitors the inductor current from the output through pmos switch d. should this negative inductor current exceed 500ma typical, the LTC3534 shuts off switch d. four-switch control figure 1 shows a simpli? ed diagram of how the four internal switches are connected to the inductor, pv in , v out , pgnd1 and pgnd2. figure 2 shows the regions of operation for the LTC3534 as a function of the internal control voltage, v ci . dependent on the magnitude of v ci , the LTC3534 will operate in buck, buck-boost or boost mode. v ci is a level 5 sw1 6 sw2 l1 pmos a nmos b 12 pv in pmos d nmos c 3534 f01 11 4 7 v out pgnd1 pgnd2 85% d max boost d min boost d max buck duty cycle 0% v4 ( ^ 1.2v) internal control voltage, v ci v3 ( ^ 720mv) boost region buck region buck-boost region v2 ( ^ 640mv) v1 ( ^ 100mv) 3534 f02 a on, b off pwm c and d switches d on, c off pwm a and b switches four switch pwm figure 1. simpli? ed diagram of output switches figure 2. switch control vs internal control voltage, v ci
LTC3534 10 3534f shifted voltage from the output of the error ampli? er (v c pin), see figure 3. the four power switches are properly phased so the transfer between operating modes is con- tinuous, smooth and transparent to the user. when v in approaches v out the buck-boost region is entered, where the conduction time of the four switch region is typically 125ns. referring to figures 1 and 2, the various regions of operation will now be described. buck region (v in > v out ) switch d is always on and switch c is always off dur- ing this mode. when the internal control voltage, v ci , is above voltage v1, output a begins to switch. during the off-time of switch a, synchronous switch b turns on for the remainder of the period. switches a and b will alter- nate similar to a typical synchronous buck regulator. as the control voltage increases, the duty cycle of switch a increases until the maximum duty cycle of the converter in buck mode reaches d max_buck , given by: d max_buck = (100 C d4 sw )% where d4 sw = duty cycle % of the four switch range. d4 sw = (125ns ? f) ? 100% where f = operating frequency in hz, typically 1mhz. hence, d4 sw = 12.5% for the LTC3534. d max_buck = 87.5% beyond this point the four switch, or buck-boost region is reached. buck-boost or four switch (v in ~ v out ) when the internal control voltage, v ci , is above voltage v2, switch pair ad remain on for duty cycle d max_buck , and the switch pair ac begins to phase in. as switch pair ac phases in, switch pair bd phases out accordingly. when v ci reaches the edge of the buck-boost range, at voltage v3, the ac switch pair completely phase out the bd pair, and the boost phase begins at duty cycle d4 sw . the input voltage, v in , where the four switch region begins is given by: v in = v out 1 ? 125ns ? f () v the v in potential at which the four switch region ends is given by: v in = v out ? (1 C d) = v out ? (1 C 125ns ? ?) v where f = operating frequency in hz, typically 1mhz. hence, for the LTC3534, v in(enter4sw) ? v out 0.875 v approximate v in potential at which the four switch region is entered. v in(4swexit) ? 0.875 ? v out v approximate v in potential at which the four switch region is exited. boost region (v in < v out ) switch a is always on and switch b is always off during this mode. when the internal control voltage, v ci , is above voltage v3, switch pair cd will alternately switch to provide a boosted output voltage. this operation is typical to a synchronous boost regulator. the maximum duty cycle of the converter is limited to 85% typical and is reached when v ci is above v4. burst mode operation burst mode operation reduces the LTC3534s quiescent current consumption at light loads and improves overall conversion ef? ciency, increasing battery life. during burst mode operation the LTC3534 delivers energy to the output until it is regulated and then enters a sleep state where the switches are off and the quiescent current drops to 25a typical. in this mode the output ripple has a variable frequency component that depends upon load current, and will typically be about 2% peak-to-peak. burst mode operation ripple can be reduced slightly by using more output capacitance (47f or greater). another method of reducing burst mode operation ripple is to place a small feedforward capacitor across the upper resistor in the v out feedback divider network (as in type iii compensa- tion), see figure 6. operation
LTC3534 11 3534f in burst mode operation the typical maximum average output currents in the three operating regions, buck, four switch, and boost are given by: i out(max)burstCbuck 100ma; burst mode operation C buck region: v in > v out i out(max)burstCfour_switch 200ma; burst mode operation C four switch region: v in v out i out(max)burst ? boost 200 ? v in v out ma; burst mode operation C boost region: v in < v out the ef? ciency below 1ma becomes dominated primarily by the quiescent current. the burst mode operation ef- ? ciency is given by: efficiency ? ?i load 25a + i load where is typically 90% during burst mode operation. a graph of burst mode operation maximum output current vs v in (for v out = 5v) is provided in the typical perfor- mance characteristics section. burst mode operation to fixed frequency transient response in burst mode operation, the compensation network is not used and v c is disconnected from the error ampli? er. during long periods of burst mode operation, leakage currents in the external components or on the pc board could cause the compensation capacitor to charge (or discharge), which could result in a large output transient when returning to ? xed frequency mode operation, even at the same load current. to prevent this, the LTC3534 incorporates an active clamp circuit that holds the voltage on v c at an optimal voltage during burst mode operation. this minimizes any output transient when returning to ? xed frequency mode operation. for optimum transient response, type iii compensation is also recommended to broad band the control loop and roll off past the two pole response of the output lc ? lter. (see closing the feedback loop). soft-start the soft-start function is combined with shutdown. when the run/ss pin is brought above 1v typical, the LTC3534 is enabled but the error ampli? er duty cycle is clamped from v c . a detailed diagram of this function is shown in figure 3. the components r ss and c ss provide a slow ramping voltage on run/ss to provide a soft-start function. to ensure that v c is not being clamped, run/ss must be raised to 2.4v or above. operation C + 15 14 13 2 11 v in c ss r ss run/ss 1v fb r1 r2 c p1 v c v ci v out 1v to pwm comparators chip enable enable signal 3534 f03 C + error amp figure 3. soft-start circuitry
LTC3534 12 3534f applications information fb v c v in pv in v out pwm run/ss gnd pgnd1 sw1 sw2 pgnd2 2 3 4 5 6 7 15 14 13 12 11 10 3534 f04 v in v out pwm multiple vias figure 4. recommended component placement. traces carrying high current are direct. trace area at fb and v c pins are kept low. lead length to battery should be kept short. keep v out and v in ceramic capacitors close to their ic pins. inductor selection the high frequency operation of the LTC3534 allows the use of small surface mount inductors. the inductor ripple current is typically set to 20% to 40% of the maximum inductor current. for a given ripple the inductance terms are given as follows: l boost > v in(min) ?v out ?v in(min) () f? i l ?v out h l buck > v out ?v in(max) ?v out () f? i l ?v in(max) h where f = switching frequency in hz, typically 1mhz. i l = maximum allowable inductor ripple current, a v in(min) = minimum input voltage, v v in(max) = maximum input voltage, v v out = output voltage, v for high ef? ciency, choose a ferrite inductor with a high frequency core material to reduce core loses. the induc- tor should have low esr (equivalent series resistance) to reduce the i 2 r losses, and must be able to handle the peak inductor current without saturating. molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 1a to 2a region. to minimize radiated noise, use a shielded inductor. see table 1 for a suggested list of inductor suppliers. table 1. inductor vendor information supplier phone fax or e-mail website coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com fdk (408) 432-8331 america@fdk.com www.fdk.com murata (814) 237-1431 (800) 831-9172 (814) 238-0490 www.murata.com sumida usa: (847) 956-0666 japan: 81(3) 3607-5111 usa: (847) 956-0702 japan: 81(3) 3607-5144 www.sumida.com tdk (847) 803-6100 (847) 803-6296 www.component.tdk.com toko (847) 297-0070 (847) 699-7864 www.tokoam.com component selection
LTC3534 13 3534f applications information output capacitor selection the bulk value of the output ? lter capacitor is set to reduce the ripple due to charge into the capacitor each cycle. the steady state ripple due to charge is given by: v p-p boost = i out ?v out ?v in(min) () c out ?v out ?f v v p-p buck = 1 8?l?c out ?f 2 ? v in(max) ?v out () ?v out v in(max) v where f = switching frequency in hz, typically 1mhz. c out = output ? lter capacitor, f i out = output load current, a the output capacitance is usually many times larger than the minimum value in order to handle the transient response requirements of the converter. as a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. a 22f or larger ceramic capacitor is appropriate for most applications. the other component of ripple is due to the esr (equiva- lent series resistance) of the output capacitor. low esr capacitors should be used to minimize output voltage ripple. for surface mount applications, taiyo yuden or tdk ceramic capacitors, avx tps series tantalum capaci- tors or sanyo poscap are recommended. see table 2 for contact information. input capacitor selection since v in is the supply voltage for the ic, as well as the input to the power stage of the converter, it is recom- mended to place at least a 10f, low esr ceramic bypass capacitor close to the pv in /v in and pgnd/gnd pins. it is also important to minimize any stray resistance from the converter to the battery or other power source. optional schottky diodes schottky diodes across the synchronous switches b and d are not required, but do provide a lower drop during the break-before-make time (typically 15ns), thus improving ef? ciency. use a surface mount schottky diode such as an mbrm120t3 or equivalent. do not use ordinary recti? er diodes since their slow recovery times will compromise ef? ciency. output voltage < 1.8v the LTC3534 can operate as a buck converter with output voltages as low as 400mv. since synchronous switch d is powered from v out and the r ds(on) will increase signi? - cantly at output voltages below 1.8v typical, a schottky diode is required from sw2 to v out to provide the conduc- tion path to the output at low v out voltages. the current limit is folded back to 800ma when v out < 0.9v typical which will signi? cantly reduce the output current capabil- ity of the application. note that burst mode operation is inhibited at output voltages below 1.6v typical. closing the feedback loop the LTC3534 incorporates voltage mode pwm control. the control to output gain varies with operation region (buck, boost, buck-boost), but is usually no greater than 15. the output ? lter exhibits a double pole response, as given by: f filter _pole = 1 2? ?l1?c out hz (in buck mode) f filter _pole = v in 2?v out ? ?l1?c out hz (in boost mode) where l1 is in henries and c out is in farads. table 2. capacitor vendor information supplier phone fax website avx (803) 448-9411 (803) 448-1943 www.avxcorp.com sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com taiyo yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com tdk (847) 803-6100 (847) 803-6296 www.component.tdk.com
LTC3534 14 3534f applications information the output ? lter zero is given by: f filter _ zero = 1 2? ?r esr ?c out hz where r esr is the equivalent series resistance of the output capacitor. a troublesome feature in boost mode is the right-half plane zero (rhp), given by: f rhpz = v in 2 2? ?i out ?l1?v out hz the loop gain is typically rolled off before the rhp zero frequency. a simple type i compensation network can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. to ensure proper phase margin using type i compensation, the loop must be crossed over a decade before the lc double pole. referring to figure 5, the unity-gain frequency of the error ampli? er utilizing type i compensation is given by: f ug = 1 2? ?r1?c p1 hz most applications demand an improved transient response to allow a smaller output ? lter capacitor. to achieve a higher bandwidth, type iii compensation is required, providing two zeros to compensate for the double-pole response of the output ? lter. referring to figure 6, the location of the poles and zeros are given by: f pole1 ? 1 2? ?5 10 3 ?r1?c p1 hz (which is extremely close to dc) f zero1 = 1 2? ?r z ?c p1 hz f zero2 = 1 2? ?r1?c z1 hz f pole2 = 1 2? ?r z ?c p2 hz where resistance is in ohms and capacitance is in far- ads. 1v r1 r2 3534 f05 fb 15 11 v c c p1 v out 14 C + error amp 1v r1 r2 3534 f06 fb 15 11 v c c p1 r z v out 14 c p2 c z1 C + error amp figure 5. error ampli? er with type i compensation figure 6. error ampli? er with type iii compensation
LTC3534 15 3534f typical applications + sw1 r ff 10k r ss 200k c ss 0.056f r z 15k r2 162k r1 649k 3534 ta02a c z1 33pf c p1 330pf c p2 10pf c out 22f v out 5v 500ma sw2 pgnd2 pgnd1 gnd pv in v in pwm run/ss burst pwm v out fb v c l1 5h LTC3534 c in 10f 4 alkaline/ nimh cells v in 3.6v to 6.4v l1: coilcraft mss7341 load current (ma) efficiency (%) 3534 ta02b 100 90 50 60 70 80 40 30 10 20 0.01 0.1 100 1000 10 1 burst mode operation v in = 3.6v v in = 5v v in = 6.4v 4 alkaline/nimh to 5v at 500ma 4 alkaline/nimh cells to 5v ef? ciency vs i load
LTC3534 16 3534f typical applications sw1 r ff 10k r ss 200k c ss 0.056f r z 15k r2 162k *note: output current can be less than 500ma if usb input current limit reached. r1 649k 3534 ta03a c z1 33pf c p1 330pf c p2 10pf c out 22f v out 5v 500ma* sw2 pgnd2 pgnd1 gnd pv in v in pwm run/ss burst pwm v out fb v c l1 5h LTC3534 c in 10f usb 4.35v to 5.25v l1: coilcraft mss7341 load current (ma) efficiency (%) 3534 ta03b 100 90 50 60 70 80 40 30 10 20 0.01 0.1 100 1000 10 1 burst mode operation v in = 4.35v v in = 4.8v v in = 5.25v usb to 5v at 500ma usb to 5v ef? ciency vs i load
LTC3534 17 3534f typical applications + sw1 r ff 10k r ss 200k c ss 0.056f r z 15k r2 162k r1 374k 3534 ta04a c z1 66pf c p1 470pf c p2 10pf c out 22f v out 3.3v 400ma sw2 pgnd2 pgnd1 gnd pv in v in pwm run/ss burst pwm v out fb v c l1 3.3h LTC3534 c in 10f 1 li-ion cell v in 2.7v to 4.2v l1: tdk rlf7030 load current (ma) 20 30 40 50 60 70 80 90 efficiency (%) 100 0.01 1 10 100 1000 3534 ta04b 10 0.1 v in = 2.7v v in = 3.6v v in = 4.2v burst mode operation li-ion to 3.3v at 400ma li-ion to 3.3v ef? ciency vs i load
LTC3534 18 3534f package description dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1 notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 package outline 0.25 0.05
LTC3534 19 3534f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 C .244 (5.817 C 6.198) .150 C .157** (3.810 C 3.988) 16 15 14 13 .189 C .196* (4.801 C 4.978) 12 11 10 9 .016 C .050 (0.406 C 1.270) .015 p .004 (0.38 p 0.10) s 45 o 0 o C 8 o typ .007 C .0098 (0.178 C 0.249) .0532 C .0688 (1.35 C 1.75) .008 C .012 (0.203 C 0.305) typ .004 C .0098 (0.102 C 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 C .165 .0250 bsc .0165 p .0015 .045 p .005 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641)
LTC3534 20 3534f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0209 ? printed in usa related parts part number description comments ltc3125 1.2a (i sw ), 1.5mhz, synchronous step-up dc/dc converter with programmable input current 93% ef? ciency, v in : 1.8v to 5v, v out(max) = 5.25v, i q = 15a, i sd < 1a, 5% input current accuracy, 200ma to 1a program range, 2mm 3mm dfn package ltc3421 3a (i sw ), 3mhz, synchronous step-up dc/dc converter with output disconnect 96% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd <1a, qfn24 package ltc3422 1.5a (i sw ), 3mhz, synchronous step-up dc/dc converter with output disconnect 96% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 25a, i sd <1a, dfn10 package ltc3425 5a (i sw ), 8mhz (low ripple), 4-phase synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd <1a, qfn32 package ltc3429 600ma (i sw ), 500khz, synchronous step-up dc/dc converter with output disconnect and soft-start 96% ef? ciency, v in : 0.5v to 4.4v, v out(max) = 5v, i q = 20a, i sd <1a, thinsot-23 package ltc3440 600ma (i out ), 2mhz, synchronous buck-boost dc/dc converter 96% ef? ciency, v in : 2.5v to 5.5v, v out(max) = 5.5v, i q = 25a, i sd <1a, msop and dfn packages ltc3441/ltc3443 1.2a (i out ), 1mhz/600khz, synchronous buck-boost dc/dc converter 95%/96% ef? ciency, v in : 2.4v to 5.5v, v out(max) = 5.25v, i q = 35a/28a, i sd <1a, msop packages ltc3442 1.2a (i out ), 2mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in : 2.4v to 5.5v, v out(max) = 5.25v, i q = 25a, i sd <1a, dfn package ltc3444 400ma (i out ), 1.5mhz, synchronous buck-boost dc/dc converter with wide v out range 93% ef? ciency, v in : 2.7v to 5.5v, v out : 0.5v to 5v, i sd <1a, dfn package, ideal for wcdma pa bias ltc3520 1a (i out ), 2mhz synchronous buck-boost, 600ma buck dc/dc converter 95% ef? ciency, v in : 2.2v to 5.5v, v out(max) = 5.25v, v out(min) = 0.8v; i q = 55a, i sd < 1a, qfn package ltc3522 synchronous 400ma (i out ) buck-boost and 200ma (i out ) buck, 1mhz, dc/dc converters 95% ef? ciency, v in : 2.4v to 5.5v, v out(max) = 5.25v, v out(min) = 0.6v; i q = 25a, i sd <1a, qfn package ltc3526l 500ma (i out ), 1mhz synchronous step-up dc/dc converter with output disconnect 94% ef? ciency, v in : 0.8v to 5v, v out(max) = 5.25v, i q = 9a, i sd <1a, 2mm 2mm dfn-6 package ltc3530 600ma (i out ), 2mhz, synchronous buck-boost dc/dc converter with wide input voltage range 96% ef? ciency, v in : 1.8v to 5.5v, v out(max) = 5.25v, i q = 40a, i sd <1a, msop and dfn packages ltc3531 200ma (i out ), burst mode operation, synchronous buck-boost dc/dc converter with adjustable and fixed v out versions 90% ef? ciency, v in : 1.8v to 5.5v, v out(max) = 5v, i q = 16a always since burst mode operation, i sd <1a, small thinsot and dfn packages ltc3532 500ma (i out ), 2mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in : 2.4v to 5.5v, v out(max) = 5.25v, i q = 35a, i sd <1a, msop and dfn packages ltc3533 2a (i out ), 2mhz, synchronous buck-boost dc/dc converter with wide input voltage range 96% ef? ciency, v in : 1.8v to 5.5v, v out(max) = 5.25v, i q = 40a, i sd <1a, msop and dfn packages ltc3538 800ma (i out ), 1mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in : 2.4v to 5.5v, v out(max) = 5.25v, i q = 35a, i sd = 1.5a, dfn package

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